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Message-ID: <bcc66892-4f2a-dab5-e820-29e2fc73683e@gmail.com>
Date:   Sat, 26 Nov 2016 21:55:37 -0800
From:   Florian Fainelli <f.fainelli@...il.com>
To:     Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
        robh+dt@...nel.org, mark.rutland@....com, davem@...emloft.net,
        sean.wang@...iatek.com, netdev@...r.kernel.org,
        devicetree@...r.kernel.org
Cc:     linux-amlogic@...ts.infradead.org, jbrunet@...libre.com
Subject: Re: [PATCH 2/2] net: phy: realtek: fix enabling of the TX-delay for
 RTL8211F



On 11/25/2016 05:12 AM, Martin Blumenstingl wrote:
> The old logic always enabled the TX-delay when the phy-mode was set to
> PHY_INTERFACE_MODE_RGMII. There are dedicated phy-modes which tell the
> PHY driver to enable the RX and/or TX delays:
> - PHY_INTERFACE_MODE_RGMII should disable the RX and TX delay in the
>   PHY (if required, the MAC should add the delays in this case)
> - PHY_INTERFACE_MODE_RGMII_ID should enable RX and TX delay in the PHY
> - PHY_INTERFACE_MODE_RGMII_TXID should enable the TX delay in the PHY
> - PHY_INTERFACE_MODE_RGMII_RXID should enable the RX delay in the PHY
>   (currently not supported by RTL8211F)
> 
> With this patch we enable the TX delay for PHY_INTERFACE_MODE_RGMII_ID
> and PHY_INTERFACE_MODE_RGMII_TXID.
> Additionally we now explicity disable the TX-delay, which seems to be
> enabled automatically after a hard-reset of the PHY (by triggering it's
> reset pin) to get a consistent state (as defined by the phy-mode).
> 
> This fixes a compatibility problem with some SoCs where the TX-delay was
> also added by the MAC. With the TX-delay being applied twice the TX
> clock was off and TX traffic was broken or very slow (<10Mbit/s) on
> 1000Mbit/s links.
> 
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@...glemail.com>

Reviewed-by: Florian Fainelli <f.fainelli@...il.com>
-- 
Florian

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