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Message-ID: <b6a19ca6-8bda-8573-eb7b-9ed7f80ca480@free.fr>
Date: Mon, 28 Nov 2016 20:15:27 +0100
From: Mason <slash.tmp@...e.fr>
To: Florian Fainelli <f.fainelli@...il.com>,
Sebastian Frias <sf84@...oste.net>, netdev@...r.kernel.org
Cc: davem@...emloft.net, andrew@...n.ch,
martin.blumenstingl@...glemail.com, mans@...sr.com,
alexandre.torgue@...com, peppe.cavallaro@...com,
timur@...eaurora.org, jbrunet@...libre.com
Subject: Re: [PATCH net-next v2 3/4] Documentation: net: phy: Add blurb about
RGMII
On 28/11/2016 18:43, Florian Fainelli wrote:
> On 11/28/2016 02:34 AM, Sebastian Frias wrote:
>
>> For what is worth, the Atheros at803x driver comes with RX delay enabled
>> as per HW reset.
>
> Always, or is this a behavior possibly defined via a stra-pin that can
> be changed?
Here's the data sheet:
http://www.redeszone.net/app/uploads/2014/04/AR8035.pdf
4.2.25 rgmii rx clock delay control
Offset: 0x00
bit 15: Control bit for rgmii interface rx clock delay:
1 = rgmii rx clock delay enable
0 = rgmii rx clock delay disable
HW Rst. 1
SW Rst. 1
As far as I can tell, rx delay is enabled by default, always.
The "Features" list mentions
"RGMII timing modes support internal delay and external delay on Rx path"
(Not sure about the internal vs external distinction.)
Table 3-6. RGMII AC Characteristics — no Internal Delay
Table 3-7. RGMII AC Characteristics — with internal delay added (Default)
Delay is 2 ns apparently.
There's also
4.2.27 Hib ctrl and rgmii gtx clock delay register
Offset: 0x0B
bits 6:5 Gtx_dly_val
Select the delay of gtx_clk.
00:0.25ns
01:1.3ns
10:2.4ns
11:3.4ns
I don't know what that is used for.
Maybe this is the external vs internal delay?
Regards.
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