netdev - [SIDE DISCUSSION] Re: [PATCH] phy state machine: failsafe leave invalid RUNNING state

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Message-ID: <ccab1089-4f3d-2557-c462-02276e2403da@neratec.com>
Date:   Wed, 4 Jan 2017 17:24:35 +0100
From:   Matthias May <matthias.may@...atec.com>
To:     Andrew Lunn <andrew@...n.ch>
Cc:     Zefir Kurtisi <zefir.kurtisi@...atec.com>,
        Florian Fainelli <f.fainelli@...il.com>, netdev@...r.kernel.org
Subject: [SIDE DISCUSSION] Re: [PATCH] phy state machine: failsafe leave
 invalid RUNNING state

On 04/01/17 17:16, Andrew Lunn wrote:
>> The setup is as follows:
>> mv88e6321:
>> * ports 0+1 connected to fibre-optics transceivers at fixed 100 Mbps
>> * port 4 is CPU port
>> * custom phy driver (replacement for marvell.ko) only populated with
>>   * .config_init to
>>     * set fixed speed for ports 0+1 (when in FO mode)
>>     * run genphy_config_init() for all other modes (here: CPU port)
>>   * .config_aneg=genphy_config_aneg, .read_status=genphy_read_status
> 
> Kicking off a side discussion:
> 
> Why do a custom PHY driver? What cannot you do with the current DSA
> code? I've got boards with two FO ports, and using fixed-phy is all i
> need to make them work on a 6352.
> 
>      Andrew
> 

We make two FO boards for 100Mbps and Gbit with different transceivers.
These different transceivers need each their own drive strength.
As Zefir wrote it's basically just a remap to the genphy functions with
some additional hardware specific register writes when the POR values
for FO configuration are detected on a port.

BR
Matthias