netdev - Re: [PATCH 3/3] powerpc: bpf: implement in-register swap for 64-bit endian operations

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Message-Id: <20170113175201.GD3470@naverao1-tp.localdomain>
Date:   Fri, 13 Jan 2017 23:22:01 +0530
From:   "'Naveen N. Rao'" <naveen.n.rao@...ux.vnet.ibm.com>
To:     David Laight <David.Laight@...LAB.COM>
Cc:     "mpe@...erman.id.au" <mpe@...erman.id.au>,
        "linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "ast@...com" <ast@...com>,
        "daniel@...earbox.net" <daniel@...earbox.net>,
        "davem@...emloft.net" <davem@...emloft.net>
Subject: Re: [PATCH 3/3] powerpc: bpf: implement in-register swap for 64-bit
 endian operations

On 2017/01/13 05:17PM, David Laight wrote:
> From: Naveen N. Rao
> > Sent: 13 January 2017 17:10
> > Generate instructions to perform the endian conversion using registers,
> > rather than generating two memory accesses.
> > 
> > The "way easier and faster" comment was obviously for the author, not
> > the processor.
> 
> That rather depends on whether the processor has a store to load forwarder
> that will satisfy the read from the store buffer.
> I don't know about ppc, but at least some x86 will do that.

Interesting - good to know that.

However, I don't think powerpc does that and in-register swap is likely 
faster regardless. Note also that gcc prefers this form at higher 
optimization levels.

Thanks,
Naveen