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Message-Id: <20170207.135953.1084828979443093909.davem@davemloft.net>
Date:   Tue, 07 Feb 2017 13:59:53 -0500 (EST)
From:   David Miller <davem@...emloft.net>
To:     lukma@...x.de
Cc:     f.fainelli@...il.com, m-karicheri2@...com,
        linux-kernel@...r.kernel.org, eric@...estrom.ch, andrew@...n.ch,
        netdev@...r.kernel.org, kishon@...com, grygorii.strashko@...com
Subject: Re: [PATCH v3 3/3] net: phy: dp83867: Recover from "port
 mirroring" N/A MODE4

From: Lukasz Majewski <lukma@...x.de>
Date: Tue,  7 Feb 2017 06:20:24 +0100

> The DP83867 when not properly bootstrapped - especially with LED_0 pin -
> can enter N/A MODE4 for "port mirroring" feature.
> 
> To provide normal operation of the PHY, one needs not only to explicitly
> disable the port mirroring feature, but as well stop some IC internal
> testing (which disables RGMII communication).
> 
> To do that the STRAP_STS1 (0x006E) register must be read and RESERVED bit
> 11 examined. When it is set, the another RESERVED bit (11) at PHYCR
> (0x0010) register must be clear to disable testing mode and enable RGMII
> communication.
> 
> Thorough explanation of the problem can be found at following e2e thread:
> "DP83867IR: Problem with RESERVED bits in PHY Control Register (PHYCR) -
> Linux driver"
> 
> https://e2e.ti.com/support/interface/ethernet/f/903/p/571313/2096954#2096954
> 
> Signed-off-by: Lukasz Majewski <lukma@...x.de>
> ---
> Changes for v3:
> - None

Applied.

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