netdev - Re: [PATCH net] at803x: insure minimum delay for SGMII link AN completion ckeck

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Message-ID: <20170214145044.GF32480@lunn.ch>
Date:   Tue, 14 Feb 2017 15:50:44 +0100
From:   Andrew Lunn <andrew@...n.ch>
To:     Claudiu Manoil <claudiu.manoil@....com>
Cc:     Zefir Kurtisi <zefir.kurtisi@...atec.com>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "David S. Miller" <davem@...emloft.net>,
        Florian Fainelli <f.fainelli@...il.com>
Subject: Re: [PATCH net] at803x: insure minimum delay for SGMII link AN
 completion ckeck

On Tue, Feb 14, 2017 at 02:31:53PM +0000, Claudiu Manoil wrote:
> >-----Original Message-----
> >From: Andrew Lunn [mailto:andrew@...n.ch]
> >Sent: Monday, February 13, 2017 7:31 PM
> >Subject: Re: [PATCH net] at803x: insure minimum delay for SGMII link AN
> >completion ckeck
> >
> 
> [...]
> 
> >>
> >> I can confirm that link status changes are signaled via interrupts ("phy_interrupt")
> >> in this case.
> >
> >Is there a way to enable an interrupt when SGMII signalled link
> >changes has happened? Maybe another interrupt enable bit somewhere?
> >That would avoid having to sleep().
> >
> 
> No, except for the interrupt lines coming from the external AR8033 PHYs there's 
> nothing else (documentation on the SoC and board is available on nxp.com).
> I think this question hints to the actual problem, that the internal SGMII link 
> should have a separate state (and state machine) apart from the external link's
> state.

Yes. I think this is something Russell Kings phylink patchset tried to
address. He has something similar. SGMII link to an SFP cage, which
could have a copper module plugged in. So again, multiple PHYs in a
chain.

	Andrew