netdev - RE: [PATCH net-next v7 1/2] qed: Add infrastructure for PTP support

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Message-ID: <BL2PR07MB23068A1A0E584D18BFC3913F8D5A0@BL2PR07MB2306.namprd07.prod.outlook.com>
Date:   Thu, 16 Feb 2017 12:48:44 +0000
From:   "Mintz, Yuval" <Yuval.Mintz@...ium.com>
To:     Eric Dumazet <eric.dumazet@...il.com>
CC:     "davem@...emloft.net" <davem@...emloft.net>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "richardcochran@...il.com" <richardcochran@...il.com>,
        "Kalluru, Sudarsana" <Sudarsana.Kalluru@...ium.com>
Subject: RE: [PATCH net-next v7 1/2] qed: Add infrastructure for PTP support

> > +/* Read Phy Hardware Clock */
> > +static int qed_ptp_hw_read_cc(struct qed_dev *cdev, u64 *phc_cycles)
> > +{
> > +	struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev);
> > +	struct qed_ptt *p_ptt = p_hwfn->p_ptp_ptt;
> > +	u32 temp = 0;
> > +
> > +	temp = qed_rd(p_hwfn, p_ptt, NIG_REG_TSGEN_SYNC_TIME_LSB);
> > +	*phc_cycles = qed_rd(p_hwfn, p_ptt,
> NIG_REG_TSGEN_SYNC_TIME_MSB);
> > +	*phc_cycles <<= 32;
> > +	*phc_cycles |= temp;
> > +
> > +	return 0;
> > +}
> 
> LSB and MSB being read non atomically, it looks like you could have an error
> of (1<<32) cycles here.
> 
> (You read LSB value close to 0xFFFFFFFF right before it changes to 0, while
> MSB got incremented.)

Once we read the LSB, HW latches the MSB until it's read.
So it's not an issue [although probably worth a comment].