netdev - Re: Legacy features in PCI Express devices

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <2d8365c0-f46e-981f-beba-1331bd00b707@arm.com>
Date:   Mon, 13 Mar 2017 17:55:46 +0000
From:   Robin Murphy <robin.murphy@....com>
To:     Mason <slash.tmp@...e.fr>, linux-pci <linux-pci@...r.kernel.org>
Cc:     Bjorn Helgaas <helgaas@...nel.org>,
        David Laight <david.laight@...lab.com>,
        Thibaud Cornic <thibaud_cornic@...madesigns.com>,
        Phuong Nguyen <phuong_nguyen@...madesigns.com>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        netdev <netdev@...r.kernel.org>,
        Tim Harvey <tharvey@...eworks.com>,
        Arnd Bergmann <arnd@...db.de>
Subject: Re: Legacy features in PCI Express devices

On 13/03/17 17:39, Mason wrote:
> On 13/03/2017 18:12, Robin Murphy wrote:
> 
>> On 13/03/17 16:10, Mason wrote:
>>
>>> There are two revisions of our PCI Express controller.
>>>
>>> Rev 1 did not support the following features:
>>>
>>>   1) legacy PCI interrupt delivery (INTx signals)
>>>   2) I/O address space
>>>
>>> Internally, someone stated that such missing support would prevent
>>> some PCIe cards from working with our controller.
>>>
>>> Are there really modern PCIe cards that require 1) and/or 2)
>>> to function?
>>>
>>> Can someone provide examples of such cards, so that I may test them
>>> on both revisions?
>>>
>>> I was told to check ath9k-based cards. Any other examples?
>>>
>>> Looking around, I came across this thread:
>>> http://lists.infradead.org/pipermail/linux-arm-kernel/2016-March/418254.html
>>> "i.MX6 PCIe: Fix imx6_pcie_deassert_core_reset() polarity"
>>>
>>> IIUC, although some PCIe boards do support MSI, the driver might not
>>> put in the work to use that infrastructure, and instead reverts to
>>> legacy interrupts. (So it is a SW issue, in a sense.)
>>
>> Secondary to that category is endpoints which nominally support MSI, but
>> in a way which is unreliable or otherwise broken. My experience shows
>> that the Silicon Image SiI 3132 (as integrated on ARM Juno boards, but
>> seemingly also relatively common on 'generic' 2-port SATA cards) falls
>> into that category - using the command-line parameter to force MSIs
>> instead of legacy interrupts leads to the the machine barely reaching
>> userspace before something goes horribly wrong:
> 
> Do drivers typically support *both* MSI and INTx?

I'm not sure about "typically", but it certainly happens. For example,
the Intel e1000e NIC driver is one I know of which can fall back from
MSI-X to MSI to legacy dynamically.

> Specifically, would the xhci driver support both?

Line 415 of xhci.c would appear to imply so.

> If I remove MSI support from my kernel, I might be able to test
> legacy interrupt support that way, right?

Indeed, disabling CONFIG_PCI_MSI should leave drivers with no other choice.

Robin.

> 
> Regards.
>