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Message-Id: <ef15bda1b3d0e6cda8e7caf038798a518f2ed606.1489575025.git.jpinto@synopsys.com>
Date: Wed, 15 Mar 2017 11:04:52 +0000
From: Joao Pinto <Joao.Pinto@...opsys.com>
To: davem@...emloft.net
Cc: peppe.cavallaro@...com, alexandre.torgue@...com,
netdev@...r.kernel.org, Joao Pinto <Joao.Pinto@...opsys.com>
Subject: [PATCH v3 net-next 08/11] net: stmmac: prepare rx/tx set tail function for multiple queues
This patch prepares RX and TX set tail functions for multiple queues.
Signed-off-by: Joao Pinto <jpinto@...opsys.com>
---
changes v1->v3:
- Just to keep up the patch-set version
drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c
index da54c0b..49f5687 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c
@@ -37,12 +37,12 @@ int dwmac4_dma_reset(void __iomem *ioaddr)
void dwmac4_set_rx_tail_ptr(void __iomem *ioaddr, u32 tail_ptr, u32 chan)
{
- writel(tail_ptr, ioaddr + DMA_CHAN_RX_END_ADDR(0));
+ writel(tail_ptr, ioaddr + DMA_CHAN_RX_END_ADDR(chan));
}
void dwmac4_set_tx_tail_ptr(void __iomem *ioaddr, u32 tail_ptr, u32 chan)
{
- writel(tail_ptr, ioaddr + DMA_CHAN_TX_END_ADDR(0));
+ writel(tail_ptr, ioaddr + DMA_CHAN_TX_END_ADDR(chan));
}
void dwmac4_dma_start_tx(void __iomem *ioaddr, u32 chan)
--
2.9.3
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