lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <bfc958ff-43fb-2bd6-6fdb-67e7dd0418c0@cogentembedded.com>
Date:   Wed, 29 Mar 2017 14:16:52 +0300
From:   Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
To:     Jeff Kirsher <jeffrey.t.kirsher@...el.com>, davem@...emloft.net
Cc:     Paul M Stillwell Jr <paul.m.stillwell.jr@...el.com>,
        netdev@...r.kernel.org, nhorman@...hat.com, sassmann@...hat.com,
        jogreene@...hat.com
Subject: Re: [net-next 03/13] i40e: use register for XL722 control register
 read/write

Hello!

On 3/29/2017 1:12 PM, Jeff Kirsher wrote:

> From: Paul M Stillwell Jr <paul.m.stillwell.jr@...el.com>
>
> The XL722 doesn't support the AQ command to read/write the control
> register so enable it to bypass the check and use the direct read/write
> method.
>
> Change-ID: Iefecc737b57207485c90845af5989d5af518bf16
> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@...el.com>
> Tested-by: Andrew Bowers <andrewx.bowers@...el.com>
> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@...el.com>
> ---
>  drivers/net/ethernet/intel/i40e/i40e_common.c   | 8 ++++++--
>  drivers/net/ethernet/intel/i40evf/i40e_common.c | 8 ++++++--
>  2 files changed, 12 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/net/ethernet/intel/i40e/i40e_common.c b/drivers/net/ethernet/intel/i40e/i40e_common.c
> index 95946f41002b..f9db95aa3a20 100644
> --- a/drivers/net/ethernet/intel/i40e/i40e_common.c
> +++ b/drivers/net/ethernet/intel/i40e/i40e_common.c
> @@ -4963,7 +4963,9 @@ u32 i40e_read_rx_ctl(struct i40e_hw *hw, u32 reg_addr)
>  	int retry = 5;
>  	u32 val = 0;
>
> -	use_register = (hw->aq.api_maj_ver == 1) && (hw->aq.api_min_ver < 5);
> +	use_register = (((hw->aq.api_maj_ver == 1) &&
> +			(hw->aq.api_min_ver < 5)) ||
> +			(hw->mac.type == I40E_MAC_X722));

    () around the right operand of the assignment not really needed. Well, 
neither around || and &&...

>  	if (!use_register) {
>  do_retry:
>  		status = i40e_aq_rx_ctl_read_register(hw, reg_addr, &val, NULL);
> @@ -5022,7 +5024,9 @@ void i40e_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val)
>  	bool use_register;
>  	int retry = 5;
>
> -	use_register = (hw->aq.api_maj_ver == 1) && (hw->aq.api_min_ver < 5);
> +	use_register = (((hw->aq.api_maj_ver == 1) &&
> +			(hw->aq.api_min_ver < 5)) ||
> +			(hw->mac.type == I40E_MAC_X722));

    Same here...

>  	if (!use_register) {
>  do_retry:
>  		status = i40e_aq_rx_ctl_write_register(hw, reg_addr,
> diff --git a/drivers/net/ethernet/intel/i40evf/i40e_common.c b/drivers/net/ethernet/intel/i40evf/i40e_common.c
> index 89dfdbca13db..626fbf1ead4d 100644
> --- a/drivers/net/ethernet/intel/i40evf/i40e_common.c
> +++ b/drivers/net/ethernet/intel/i40evf/i40e_common.c
> @@ -958,7 +958,9 @@ u32 i40evf_read_rx_ctl(struct i40e_hw *hw, u32 reg_addr)
>  	int retry = 5;
>  	u32 val = 0;
>
> -	use_register = (hw->aq.api_maj_ver == 1) && (hw->aq.api_min_ver < 5);
> +	use_register = (((hw->aq.api_maj_ver == 1) &&
> +			(hw->aq.api_min_ver < 5)) ||
> +			(hw->mac.type == I40E_MAC_X722));

    And here...

>  	if (!use_register) {
>  do_retry:
>  		status = i40evf_aq_rx_ctl_read_register(hw, reg_addr,
> @@ -1019,7 +1021,9 @@ void i40evf_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val)
>  	bool use_register;
>  	int retry = 5;
>
> -	use_register = (hw->aq.api_maj_ver == 1) && (hw->aq.api_min_ver < 5);
> +	use_register = (((hw->aq.api_maj_ver == 1) &&
> +			(hw->aq.api_min_ver < 5)) ||
> +			(hw->mac.type == I40E_MAC_X722));

    And here...

>  	if (!use_register) {
>  do_retry:
>  		status = i40evf_aq_rx_ctl_write_register(hw, reg_addr,

MBR, Sergei

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ