netdev - [PATCH net-next 6/8] fsl/qe: add bit description for SYNL register for GUMR

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Date:   Wed, 17 May 2017 17:24:37 +0200
From:   Holger Brunck <holger.brunck@...mile.com>
To:     netdev@...r.kernel.org
Cc:     Holger Brunck <holger.brunck@...mile.com>,
        Zhao Qiang <qiang.zhao@....com>
Subject: [PATCH net-next 6/8] fsl/qe: add bit description for SYNL register for GUMR

Add the bitmask for the two bit SYNL register according to the QUICK
Engine Reference Manual.

Signed-off-by: Holger Brunck <holger.brunck@...mile.com>
Cc: Zhao Qiang <qiang.zhao@....com>
---
 include/soc/fsl/qe/qe.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/include/soc/fsl/qe/qe.h b/include/soc/fsl/qe/qe.h
index 0cd4c11479b1..226f915a68c2 100644
--- a/include/soc/fsl/qe/qe.h
+++ b/include/soc/fsl/qe/qe.h
@@ -668,6 +668,10 @@ struct ucc_slow_pram {
 #define UCC_FAST_GUMR_CTSS	0x00800000
 #define UCC_FAST_GUMR_TXSY	0x00020000
 #define UCC_FAST_GUMR_RSYN	0x00010000
+#define UCC_FAST_GUMR_SYNL_MASK	0x0000C000
+#define UCC_FAST_GUMR_SYNL_16	0x0000C000
+#define UCC_FAST_GUMR_SYNL_8	0x00008000
+#define UCC_FAST_GUMR_SYNL_AUTO	0x00004000
 #define UCC_FAST_GUMR_RTSM	0x00002000
 #define UCC_FAST_GUMR_REVD	0x00000400
 #define UCC_FAST_GUMR_ENR	0x00000020
-- 
2.12.0.rc1