netdev - Re: [for-next 4/6] net/mlx5: FPGA, Add basic support for Innova

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Date:   Fri, 26 May 2017 12:15:17 -0600
From:   Jason Gunthorpe <jgunthorpe@...idianresearch.com>
To:     Alexei Starovoitov <alexei.starovoitov@...il.com>
Cc:     Saeed Mahameed <saeedm@....mellanox.co.il>,
        Ilan Tayari <ilant@...lanox.com>,
        "David S. Miller" <davem@...emloft.net>,
        Doug Ledford <dledford@...hat.com>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "linux-rdma@...r.kernel.org" <linux-rdma@...r.kernel.org>,
        "jsorensen@...com" <jsorensen@...com>,
        Andy Shevchenko <andy.shevchenko@...il.com>,
        linux-fpga@...r.kernel.org,
        Alan Tull <atull@...nsource.altera.com>, yi1.li@...ux.intel.com
Subject: Re: [for-next 4/6] net/mlx5: FPGA, Add basic support for Innova

On Fri, May 26, 2017 at 10:56:25AM -0700, Alexei Starovoitov wrote:

> > for that feature which is the originating place, before defining
> > APIs/infrastructures,
> > until the feature is complete and every body is happy about it.
> 
> There is driver/fpga to manage fpga, but mlx fpga+nic combo
> will be managed via mlx5/core/fpga/
> 
> Adding fpga folks for visibility.

It would be good to use the existing fpga loading infrastructure to
get the bitstream into the NIC, and to use the same Xilinx bitstream
format as eg Zynq does for consistency.

I'm unclear how this works - there must be more to it than just a
'bump on the wire', there must be some communication channel between
the FPGA and Linux to set operational data (eg load keys) etc.

If that is register mapped into a PCI-BAR someplace then it really
should use the FPGA layer functions to manage binding drivers to that
register window.

If it is mailbox command based then it is not as good of a fit.

Is this FPGA expected to be customer programmable? In that case you
really need the full infrastructure to bind the right driver (possibly
a customer driver) to the current FPGA, to expose the correct
operational interface to the kernel.

Jason