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Message-ID: <ff45315f-72ae-4d32-3f25-3444f4d4f1fc@cogentembedded.com>
Date: Mon, 5 Jun 2017 21:45:21 +0300
From: Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
To: Paul Burton <paul.burton@...tec.com>, netdev@...r.kernel.org
Cc: "David S . Miller" <davem@...emloft.net>,
linux-mips@...ux-mips.org, Eric Dumazet <edumazet@...gle.com>,
Jarod Wilson <jarod@...hat.com>,
Tobias Klauser <tklauser@...tanz.ch>,
Mark Rutland <mark.rutland@....com>,
Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org
Subject: Re: [PATCH v4 3/7] dt-bindings: net: Document Intel pch_gbe binding
Hello!
On 06/05/2017 08:31 PM, Paul Burton wrote:
> Introduce documentation for a device tree binding for the Intel Platform
> Controller Hub (PCH) GigaBit Ethernet (GBE) device. Although this is a
> PCIe device & thus largely auto-detectable, this binding will be used to
> provide the driver with the PHY reset GPIO.
>
> Signed-off-by: Paul Burton <paul.burton@...tec.com>
> Cc: David S. Miller <davem@...emloft.net>
> Cc: Eric Dumazet <edumazet@...gle.com>
> Cc: Jarod Wilson <jarod@...hat.com>
> Cc: Mark Rutland <mark.rutland@....com>
> Cc: Rob Herring <robh+dt@...nel.org>
> Cc: Tobias Klauser <tklauser@...tanz.ch>
> Cc: devicetree@...r.kernel.org
> Cc: linux-mips@...ux-mips.org
> Cc: netdev@...r.kernel.org
>
> ---
>
> Changes in v4: None
>
> Changes in v3:
> - New patch.
>
> Changes in v2: None
>
> Documentation/devicetree/bindings/net/pch_gbe.txt | 25 +++++++++++++++++++++++
> 1 file changed, 25 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/net/pch_gbe.txt
>
> diff --git a/Documentation/devicetree/bindings/net/pch_gbe.txt b/Documentation/devicetree/bindings/net/pch_gbe.txt
> new file mode 100644
> index 000000000000..5de479c26b04
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/pch_gbe.txt
> @@ -0,0 +1,25 @@
> +Intel Platform Controller Hub (PCH) GigaBit Ethernet (GBE)
> +
> +Required properties:
> +- compatible: Should be the PCI vendor & device ID, eg. "pci8086,8802".
> +- reg: Should be a PCI device number as specified by the PCI bus
> + binding to IEEE Std 1275-1994.
> +- phy-reset-gpios: Should be a GPIO list containing a single GPIO that
> + resets the attached PHY when active.
> +
> +Example:
> +
> + eg20t_mac@2,0,1 {
> + compatible = "pci8086,8802";
> + reg = <0x00020100 0 0 0 0>;
> + phy-reset-gpios = <&eg20t_gpio 6
> + GPIO_ACTIVE_LOW>;
> + };
> +
> + eg20t_gpio: eg20t_gpio@2,0,2 {
Name it "gpio@2,0,2" please -- the node names need to be generic and
"gpio" is explicitly listed in the DT 1.0 spec...
MBR, Sergei
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