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Message-ID: <21110017.iteKCRmsvN@debian64>
Date: Mon, 05 Jun 2017 23:44:46 +0200
From: Christian Lamparter <chunkeey@...glemail.com>
To: Andrew Lunn <andrew@...n.ch>
Cc: netdev@...r.kernel.org, "David S . Miller" <davem@...emloft.net>,
Ivan Mikhaylov <ivan@...ibm.com>,
Chris Blake <chrisrblake93@...il.com>
Subject: Re: [PATCH v1 1/2] net: emac: fix reset timeout with AR8035 phy
On Monday, June 5, 2017 11:26:17 PM CEST Andrew Lunn wrote:
> > In order to stay compatible with existing configurations, the
> > driver will try the normal reset first and only falls back to
> > to the internal clock, after the first reset fails. If the
> > second reset fails as well, it will give up as before.
>
> Hi Christian
>
> This gets things probed correctly. But should you swap back to the PHY
> clock when the PHY declares the link up? Is there code already to do
> this?
>
> Andrew
>
Oh, sorry. I omitted this from the commit message. But the proposed
emac_reset() code switched to the internal clock only after the first attempt
has failed AND only for the duration of the reset.
If the reset succeeds or the reset times out, the clock is always switched
back to the external clock.
Thanks,
Christian
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