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Date:   Mon, 05 Jun 2017 17:54:57 -0400 (EDT)
From:   David Miller <davem@...emloft.net>
To:     andrew@...n.ch
Cc:     chunkeey@...glemail.com, netdev@...r.kernel.org, ivan@...ibm.com,
        chrisrblake93@...il.com
Subject: Re: [PATCH v1 1/2] net: emac: fix reset timeout with AR8035 phy

From: Andrew Lunn <andrew@...n.ch>
Date: Mon, 5 Jun 2017 23:48:57 +0200

> On Mon, Jun 05, 2017 at 11:44:46PM +0200, Christian Lamparter wrote:
>> On Monday, June 5, 2017 11:26:17 PM CEST Andrew Lunn wrote:
>> > > In order to stay compatible with existing configurations, the
>> > > driver will try the normal reset first and only falls back to
>> > > to the internal clock, after the first reset fails. If the
>> > > second reset fails as well, it will give up as before.
>> > 
>> > Hi Christian
>> > 
>> > This gets things probed correctly. But should you swap back to the PHY
>> > clock when the PHY declares the link up? Is there code already to do
>> > this?
>> > 
>> > 	Andrew
>> > 
>> Oh, sorry. I omitted this from the commit message. But the proposed 
>> emac_reset() code  switched to the internal clock only after the first attempt
>> has failed AND only for the duration of the reset.
>> 
>> If the reset succeeds or the reset times out, the clock is always switched 
>> back to the external clock.
> 
> Thanks for the clarification. Maybe add it to the commit message.

Indeed, please do.

 

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