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Date: Tue, 6 Jun 2017 10:17:09 -0600
From: Jason Gunthorpe <jgunthorpe@...idianresearch.com>
To: Ilan Tayari <ilant@...lanox.com>
Cc: Alexei Starovoitov <alexei.starovoitov@...il.com>,
Saeed Mahameed <saeedm@....mellanox.co.il>,
"David S. Miller" <davem@...emloft.net>,
Doug Ledford <dledford@...hat.com>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
"linux-rdma@...r.kernel.org" <linux-rdma@...r.kernel.org>,
"jsorensen@...com" <jsorensen@...com>,
Andy Shevchenko <andy.shevchenko@...il.com>,
"linux-fpga@...r.kernel.org" <linux-fpga@...r.kernel.org>,
Alan Tull <atull@...nsource.altera.com>,
"yi1.li@...ux.intel.com" <yi1.li@...ux.intel.com>,
Boris Pismenny <borisp@...lanox.com>
Subject: Re: [for-next 4/6] net/mlx5: FPGA, Add basic support for Innova
On Tue, Jun 06, 2017 at 06:52:15AM +0000, Ilan Tayari wrote:
> So neither the host stack nor the network are aware of them.
> They exist momentarily only on the internal traces on the board and not
> anywhere else.
Is that really true? If you are creating rocee QPs' then the RDMA
stack sees this stuff and now we have buried a RDMA ULP inside an
ethernet driver which seems really wonky..
> I don't mind explaining further, but I think you will just see it in the
> patchset when we submit.
You described exactly what I thought.. I just disagree with you that
an ethernet connected and controlled IP accelerator is 'part of the
NIC', even if it happens to be colocated on the same circuit board.
Jason
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