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Message-ID: <20170612161423.GB24829@obsidianresearch.com>
Date: Mon, 12 Jun 2017 10:14:23 -0600
From: Jason Gunthorpe <jgunthorpe@...idianresearch.com>
To: Ilan Tayari <ilant@...lanox.com>
Cc: Saeed Mahameed <saeedm@....mellanox.co.il>,
Alexei Starovoitov <alexei.starovoitov@...il.com>,
"David S. Miller" <davem@...emloft.net>,
Doug Ledford <dledford@...hat.com>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
"linux-rdma@...r.kernel.org" <linux-rdma@...r.kernel.org>,
"jsorensen@...com" <jsorensen@...com>,
Andy Shevchenko <andy.shevchenko@...il.com>,
"linux-fpga@...r.kernel.org" <linux-fpga@...r.kernel.org>,
Alan Tull <atull@...nsource.altera.com>,
"yi1.li@...ux.intel.com" <yi1.li@...ux.intel.com>,
Boris Pismenny <borisp@...lanox.com>
Subject: Re: [for-next 4/6] net/mlx5: FPGA, Add basic support for Innova
On Sun, Jun 11, 2017 at 05:59:04AM +0000, Ilan Tayari wrote:
> > This is especially true for mlx nics as there are many raw packet
> > bypass mechanisms available to userspace.
>
> The device uses internal signaling that ensures that no entity other
> than the mlx5 driver can talk over the FPGA channel. This is also
> the reason why this is not a "ULP in a driver", but rather an
> internal bus that happens to use some of our existing HW features.
You are taking both positions at once - that this is *just* a 'bump on
the wire' and everything is done via ethernet packets, and also that
there is a special internal bus that nothing needs to know about.
It is hard to be both ways, if it is ethernet packets there there are
ways to create those packets outside the driver's control and security
is a big question.
Jason
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