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Message-ID: <5f9b8bfb-41a8-a17c-6fea-581aec1d5573@huawei.com>
Date:   Sat, 22 Jul 2017 12:19:38 +0800
From:   Ding Tianhong <dingtianhong@...wei.com>
To:     Sinan Kaya <okaya@...eaurora.org>, <leedom@...lsio.com>,
        <ashok.raj@...el.com>, <bhelgaas@...gle.com>, <helgaas@...nel.org>,
        <werner@...lsio.com>, <ganeshgr@...lsio.com>,
        <asit.k.mallick@...el.com>, <patrick.j.cramer@...el.com>,
        <Suravee.Suthikulpanit@....com>, <Bob.Shaw@....com>,
        <l.stach@...gutronix.de>, <amira@...lanox.com>,
        <gabriele.paoloni@...wei.com>, <David.Laight@...lab.com>,
        <jeffrey.t.kirsher@...el.com>, <catalin.marinas@....com>,
        <will.deacon@....com>, <mark.rutland@....com>,
        <robin.murphy@....com>, <davem@...emloft.net>,
        <alexander.duyck@...il.com>,
        <linux-arm-kernel@...ts.infradead.org>, <netdev@...r.kernel.org>,
        <linux-pci@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linuxarm@...wei.com>, Bjorn Helgaas <bhelgaas@...gle.com>
Subject: Re: [PATCH v7 2/3] PCI: Enable PCIe Relaxed Ordering if supported

Hi Sinan, Bjorn:

On 2017/7/14 21:54, Sinan Kaya wrote:
> On 7/13/2017 9:26 PM, Ding Tianhong wrote:
>> There is no code to enable the PCIe Relaxed Ordering bit in the configuration space,
>> it is only be enable by default according to the PCIe Standard Specification, what we
>> do is to distinguish the RC problematic platform and clear the Relaxed Ordering bit
>> to tell the PCIe EP don't send any TLPs with Relaxed Ordering Attributes to the Root
>> Complex.
> 
> Maybe, you should change the patch commit as 
> "Disable PCIe Relaxed Ordering if not supported"...

I agree that to use the new commit title as your suggested, thanks. :)

@Bjorn do you want me to spawn a new patchset with the new commit title
and the Reviewed-by from Casey on the patch 3, or maybe you could pick this
up and modify it own ? thanks.

Ding

> 

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