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Message-ID: <CAG4TOxOFVctaGOk=bHo8XZ+Nw4mr_qM+XbhBO2=zPn3uKY-gkg@mail.gmail.com>
Date: Mon, 24 Jul 2017 12:31:39 -0700
From: Roland Dreier <roland.dreier@...il.com>
To: Alex Williamson <alex.williamson@...hat.com>
Cc: Bjorn Helgaas <bhelgaas@...gle.com>, linux-pci@...r.kernel.org,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
Emil Tantilov <emil.s.tantilov@...el.com>
Subject: Re: [PATCH] PCI: Update ACS quirk for more Intel 10G NICs
> Is there a misunderstanding of the code flow here? We're never setting
> EC. In the first code block we're just masking out requested
> capabilities where unimplemented capabilities is the same as
> implemented + enabled. We're not adding EC to the request, we're
> just not removing it based on the implemented capabilities because we
> don't interpret it the same way. Thus if someone wants to test a
> device for EC, it really needs to implement EC, we cannot assume it
> based on lack of support for EC in the ACS capability. As you point
> out, nobody really cares about EC yet though.
I guess I find the semantics confusing. For every other bit,
pci_acs_enabled() returns true if the bit is either enabled or not
implemented. For EC, it returns false if the bit is not implemented.
It's not clear to me what the use case for checking for PCI_ACS_EC
enabled would be. Seems like checking for EC in the capabilities
register would be more useful.
- R.
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