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Message-ID: <356688d9-ff04-acdb-a4a1-5faec4388c82@st.com>
Date: Wed, 2 Aug 2017 14:33:03 +0200
From: Giuseppe CAVALLARO <peppe.cavallaro@...com>
To: Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>
CC: Corentin Labbe <clabbe.montjoie@...il.com>,
Alexandre Torgue <alexandre.torgue@...com>,
<netdev@...r.kernel.org>, <stable@...r.kernel.org>
Subject: Re: [PATCH] net: ethernet: stmmac: properly set PS bit in MII
configurations during reset
Hi Thomas
On 7/29/2017 9:54 PM, Thomas Petazzoni wrote:
> Hello Giuseppe,
>
> On Wed, 28 Jun 2017 16:40:51 +0200, Giuseppe CAVALLARO wrote:
>
>> I do not want to change a critical reset function shared among
>> different platforms where
>> this problem has never met but you are right that we have to find a
>> way to proceed in order
>> to finalize your work. Let me elaborate your initial patch and I try
>> to give you a proposal asap.
>> In my mind, we should have a dedicated spear_dma_reset for your case
>> that should be used on
>> SPEAr platform driver (or by using st,spear600-gmac compatibility).
>> Also your patch did not consider the RMII and (R)GMII cases.
> Have you had the chance to cook a different proposal? Alternatively, do
> you have some specific hints to give me to make a new proposal that
> would be acceptable for you ?
yes you are right and I had no chance to enter in this topic. :-(
We could follow one of the following approaches:
- add a new small platform driver where you can add ad-hoc code for
SPEAr.
Today there is a compatibility for st,spear600-gmac inside the
dwmac-generic.c
- introduce a new DT parameter to set the PS bit when resetting the HW.
The latter should be quite easy to implement starting from your original
patch,
this approach is not intrusive and can help others in case of the same
behavior is found.
What do you think?
Regards
Peppe
>
> Thanks a lot,
>
> Thomas Petazzoni
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