netdev - [PATCH net-next] net: mvpp2: fix the packet size configuration for 10G

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Message-Id: <20170825132446.1130-1-antoine.tenart@free-electrons.com>
Date:   Fri, 25 Aug 2017 15:24:46 +0200
From:   Antoine Tenart <antoine.tenart@...e-electrons.com>
To:     davem@...emloft.net
Cc:     Antoine Tenart <antoine.tenart@...e-electrons.com>, andrew@...n.ch,
        gregory.clement@...e-electrons.com,
        thomas.petazzoni@...e-electrons.com, nadavh@...vell.com,
        linux@...linux.org.uk, mw@...ihalf.com, stefanc@...vell.com,
        netdev@...r.kernel.org
Subject: [PATCH net-next] net: mvpp2: fix the packet size configuration for 10G

The MVPP22_XLG_CTRL1_FRAMESIZELIMIT define is used as an offset, but is
defined as BIT(0). Updated its name to contains "OFFS" as in offset and
fix its value using the offset value, 0.

Reported-by: Stefan Chulski <stefanc@...vell.com>
Signed-off-by: Antoine Tenart <antoine.tenart@...e-electrons.com>
Fixes: 76eb1b1de5b6 ("net: mvpp2: set maximum packet size for 10G ports")
---

Hi Dave,

This patch fixes a bug only present in net-next as it was introduced
recently.

Thanks!
Antoine

 drivers/net/ethernet/marvell/mvpp2.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/marvell/mvpp2.c b/drivers/net/ethernet/marvell/mvpp2.c
index 7fa251bf91ae..fea9ae5b70ba 100644
--- a/drivers/net/ethernet/marvell/mvpp2.c
+++ b/drivers/net/ethernet/marvell/mvpp2.c
@@ -367,7 +367,7 @@
 #define     MVPP22_XLG_CTRL0_RX_FLOW_CTRL_EN	BIT(7)
 #define     MVPP22_XLG_CTRL0_MIB_CNT_DIS	BIT(14)
 #define MVPP22_XLG_CTRL1_REG			0x104
-#define     MVPP22_XLG_CTRL1_FRAMESIZELIMIT	BIT(0)
+#define     MVPP22_XLG_CTRL1_FRAMESIZELIMIT_OFFS	0
 #define     MVPP22_XLG_CTRL1_FRAMESIZELIMIT_MASK	0x1fff
 #define MVPP22_XLG_CTRL3_REG			0x11c
 #define     MVPP22_XLG_CTRL3_MACMODESELECT_MASK	(7 << 13)
@@ -4669,7 +4669,7 @@ static inline void mvpp2_xlg_max_rx_size_set(struct mvpp2_port *port)
 	val =  readl(port->base + MVPP22_XLG_CTRL1_REG);
 	val &= ~MVPP22_XLG_CTRL1_FRAMESIZELIMIT_MASK;
 	val |= ((port->pkt_size - MVPP2_MH_SIZE) / 2) <<
-	       MVPP22_XLG_CTRL1_FRAMESIZELIMIT;
+	       MVPP22_XLG_CTRL1_FRAMESIZELIMIT_OFFS;
 	writel(val, port->base + MVPP22_XLG_CTRL1_REG);
 }
 
-- 
2.13.5