netdev - Re: [PATCH net-next] net: mvpp2: phylink support

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Message-ID: <20170925121343.GO20805@n2100.armlinux.org.uk>
Date:   Mon, 25 Sep 2017 13:13:43 +0100
From:   Russell King - ARM Linux <linux@...linux.org.uk>
To:     Antoine Tenart <antoine.tenart@...e-electrons.com>
Cc:     davem@...emloft.net, andrew@...n.ch,
        gregory.clement@...e-electrons.com,
        thomas.petazzoni@...e-electrons.com,
        miquel.raynal@...e-electrons.com, nadavh@...vell.com,
        linux-kernel@...r.kernel.org, mw@...ihalf.com, stefanc@...vell.com,
        netdev@...r.kernel.org
Subject: Re: [PATCH net-next] net: mvpp2: phylink support

On Mon, Sep 25, 2017 at 01:53:03PM +0200, Antoine Tenart wrote:
> On Mon, Sep 25, 2017 at 11:45:32AM +0100, Russell King - ARM Linux wrote:
> > Can you describe what the GoP link IRQ is doing please?
> 
> In cases where there is no PHY connected to the MAC and no SFP cage is
> used. One example is when a SOHO switch is connected directly to a
> serdes lane. In such cases we still need to have a minimal link
> management. The GoP link interrupt helps doing so as it raises when the
> serdes is in sync and AN succeeded.

Isn't this just like a fixed link scenario, or an in-band
autonegotiation scenario (both of which phylink supports natively)?

The situation on Clearfog with the 88E6176 switch is pretty similar -
a switch connected directly via serdes to the MAC.  Currently, we
configure stuff there as a fixed link, but in actual fact the 88E6176
is configured to run the CPU facing port in 1000base-X mode, and with
appropriate tweaks, switching phylink to 1000base-X mode also works.

-- 
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
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