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Message-ID: <20171005093915.GP4037@w540>
Date: Thu, 5 Oct 2017 11:39:15 +0200
From: jacopo mondi <jacopo@...ndi.org>
To: Geert Uytterhoeven <geert@...ux-m68k.org>
Cc: Chris Brandt <Chris.Brandt@...esas.com>, andrew@...n.ch,
f.fainelli@...il.com, netdev@...r.kernel.org
Subject: Re: [PATCH 3/3] ARM: dts: gr-peach: Add ETHER pin group
Hi Geert
On Thu, Oct 05, 2017 at 11:09:40AM +0200, Geert Uytterhoeven wrote:
> Hi Jacopo,
>
> On Thu, Oct 5, 2017 at 10:58 AM, Jacopo Mondi <jacopo+renesas@...ndi.org> wrote:
> > Add pin configuration subnode for ETHER pin group and enable the interface.
> >
> > Signed-off-by: Jacopo Mondi <jacopo+renesas@...ndi.org>
>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
>
> > --- a/arch/arm/boot/dts/r7s72100-gr-peach.dts
> > +++ b/arch/arm/boot/dts/r7s72100-gr-peach.dts
>
> > @@ -88,3 +110,19 @@
> >
> > status = "okay";
> > };
> > +
> > +ðer {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <ðer_pins>;
> > +
> > + status = "okay";
> > +
> > + reset-gpios = <&port4 2 GPIO_ACTIVE_LOW>;
> > + reset-delay-us = <5>;
>
> I'm afraid the PHY people (not CCed ;-) will want you to move these reset
> properties to the phy subnode these days, despite
> Documentation/devicetree/bindings/net/mdio.txt...
Extending to:
+andrew@...n.ch
+f.fainelli@...il.com
+netdev@...r.kernel.org
To hear from them when and how they like to move those properties and
if we can apply this in this shape or not.
Otherwise, if you think it's the case, I can move them nonetheless.
Thanks
j
>
> > +
> > + renesas,no-ether-link;
> > + phy-handle = <&phy0>;
> > + phy0: ethernet-phy@0 {
> > + reg = <0>;
> > + };
> > +};
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
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