netdev - [PATCH v8 03/10] arm: dts: sunxi: h3/h5: Restore EMAC changes

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Message-Id: <20171023185626.31793-4-clabbe.montjoie@gmail.com>
Date:   Mon, 23 Oct 2017 20:56:19 +0200
From:   Corentin Labbe <clabbe.montjoie@...il.com>
To:     robh+dt@...nel.org, mark.rutland@....com,
        maxime.ripard@...e-electrons.com, wens@...e.org,
        linux@...linux.org.uk, catalin.marinas@....com,
        will.deacon@....com, peppe.cavallaro@...com,
        alexandre.torgue@...com, andrew@...n.ch, f.fainelli@...il.com
Cc:     netdev@...r.kernel.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        Corentin Labbe <clabbe.montjoie@...il.com>
Subject: [PATCH v8 03/10] arm: dts: sunxi: h3/h5: Restore EMAC changes

The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.

This patch restore sunxi-h3-h5.dtsi
This reverts partially commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC changes")

Signed-off-by: Corentin Labbe <clabbe.montjoie@...il.com>
---
 arch/arm/boot/dts/sunxi-h3-h5.dtsi | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index c1bd09dab3da..d762098fc589 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -408,6 +408,32 @@
 			clocks = <&osc24M>;
 		};
 
+		emac: ethernet@...0000 {
+			compatible = "allwinner,sun8i-h3-emac";
+			syscon = <&syscon>;
+			reg = <0x01c30000 0x10000>;
+			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "macirq";
+			resets = <&ccu RST_BUS_EMAC>;
+			reset-names = "stmmaceth";
+			clocks = <&ccu CLK_BUS_EMAC>;
+			clock-names = "stmmaceth";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+
+			mdio: mdio {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				int_mii_phy: ethernet-phy@1 {
+					compatible = "ethernet-phy-ieee802.3-c22";
+					reg = <1>;
+					clocks = <&ccu CLK_BUS_EPHY>;
+					resets = <&ccu RST_BUS_EPHY>;
+				};
+			};
+		};
+
 		spi0: spi@...8000 {
 			compatible = "allwinner,sun8i-h3-spi";
 			reg = <0x01c68000 0x1000>;
-- 
2.13.6