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Message-ID: <20171127135724.yy2jjjuby3xu74mm@lakrids.cambridge.arm.com>
Date: Mon, 27 Nov 2017 13:57:25 +0000
From: Mark Rutland <mark.rutland@....com>
To: Greentime Hu <green.hu@...il.com>
Cc: greentime@...estech.com, linux-kernel@...r.kernel.org,
arnd@...db.de, linux-arch@...r.kernel.org, tglx@...utronix.de,
jason@...edaemon.net, marc.zyngier@....com, robh+dt@...nel.org,
netdev@...r.kernel.org, deanbo422@...il.com,
devicetree@...r.kernel.org, viro@...iv.linux.org.uk,
dhowells@...hat.com, will.deacon@....com,
daniel.lezcano@...aro.org, linux-serial@...r.kernel.org,
Vincent Chen <vincentc@...estech.com>
Subject: Re: [PATCH v2 10/35] nds32: Atomic operations
Hi,
On Mon, Nov 27, 2017 at 08:27:57PM +0800, Greentime Hu wrote:
> +static inline void arch_spin_unlock(arch_spinlock_t * lock)
> +{
> + asm volatile(
> + "xor $r15, $r15, $r15\n"
> + "swi $r15, [%0]\n"
> + :
> + :"r"(&lock->lock)
> + :"memory");
> +}
This looks suspicious. There's no clobber for $r15, so isn't this
corrupting a GPR behind the back of the compiler?
Shouldn't there be a tmp variable for the register allocation rather
than hard-coding $r15?
> +static inline void arch_write_unlock(arch_rwlock_t * rw)
> +{
> + asm volatile(
> + "xor $r15, $r15, $r15\n"
> + "swi $r15, [%0]\n"
> + :
> + :"r"(&rw->lock)
> + :"memory","$r15");
> +}
This time you have a clobber, but it's still not clear to me why you
don't use a tmp variable and leave the register allocation to the
compiler.
Thanks,
Mark.
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