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Message-ID: <5c87f610-4927-faca-40a7-3f83e7f00ff7@cogentembedded.com>
Date:   Wed, 3 Jan 2018 17:48:42 +0300
From:   Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
To:     Sebastian Reichel <sebastian.reichel@...labora.co.uk>,
        Andrew Lunn <andrew@...n.ch>,
        Vivien Didelot <vivien.didelot@...oirfairelinux.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        Shawn Guo <shawnguo@...nel.org>,
        Sascha Hauer <kernel@...gutronix.de>,
        Fabio Estevam <fabio.estevam@....com>
Cc:     Ian Ray <ian.ray@...com>, Nandor Han <nandor.han@...com>,
        Rob Herring <robh+dt@...nel.org>,
        "David S. Miller" <davem@...emloft.net>, netdev@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCHv1 3/6] ARM: dts: imx6q-bx50v3: Add internal switch

Hello!

On 01/03/2018 03:26 PM, Sebastian Reichel wrote:

> B850v3, B650v3 and B450v3 all have a GPIO bit banged MDIO bus to
> communicate with a Marvell switch. On all devices the switch is
> connected to a PCI based network card, which needs to be referenced
> by DT, so this also adds the common PCI root node.
> 
> Signed-off-by: Sebastian Reichel <sebastian.reichel@...labora.co.uk>
> ---
>   arch/arm/boot/dts/imx6q-bx50v3.dtsi | 37 +++++++++++++++++++++++++++++++++++++
>   1 file changed, 37 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/imx6q-bx50v3.dtsi b/arch/arm/boot/dts/imx6q-bx50v3.dtsi
> index b915837bbb5f..689981e90e68 100644
> --- a/arch/arm/boot/dts/imx6q-bx50v3.dtsi
> +++ b/arch/arm/boot/dts/imx6q-bx50v3.dtsi
> @@ -92,6 +92,31 @@
>   		mux-int-port = <1>;
>   		mux-ext-port = <4>;
>   	};
> +
> +	aliases {
> +		mdio-gpio0 = &mdio0;
> +	};
> +
> +	mdio0: mdio-gpio {
> +		compatible = "virtual,mdio-gpio";
> +		gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>, /* mdc */
> +			<&gpio2 7 GPIO_ACTIVE_HIGH>; /* mdio */
> +
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		switch@0 {
> +				compatible = "marvell,mv88e6240";

    Why suddenly 2 extra tabs instead of 1?

> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				reg = <0>;
> +
> +				switch_ports: ports {
> +					#address-cells = <1>;
> +					#size-cells = <0>;
> +				};
> +		};
> +	};
>   };
>   
>   &ecspi5 {
[...]

MBR, Sergei

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