[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20180209145954.GA29333@lunn.ch>
Date: Fri, 9 Feb 2018 15:59:54 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Kunihiko Hayashi <hayashi.kunihiko@...ionext.com>
Cc: netdev@...r.kernel.org
Subject: Re: net: phy: question about phy_is_internal for generic-phy
> There are some SoCs that have a built-in phy, and sometimes
> these SoCs can choose to use built-in phy or external phy.
O.K. This is the same use case we had at the end of last year.
How are the MDIO busses arranged? Is there an internal MDIO bus and an
external MDIO bus? How do you change between the internal and the
external? Or is it one bus, with the two PHYs having different
addresses?
For the hardware in question last year, an MDIO MUX was implemented.
The MAC has a phy-handle pointing to either the internal PHY on the
internal MDIO bus, or the external PHY on the external MDIO bus. The
MDIO MUX layer would then set the register to select between the two.
https://patchwork.kernel.org/patch/10025279/
Andrew
Powered by blists - more mailing lists