netdev - Re: [PATCH net-next] net: stmmac: remove superfluous wmb() memory barriers

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Message-Id: <20180309.101520.1551234308448290917.davem@davemloft.net>
Date:   Fri, 09 Mar 2018 10:15:20 -0500 (EST)
From:   David Miller <davem@...emloft.net>
To:     Jose.Abreu@...opsys.com
Cc:     niklas.cassel@...s.com, peppe.cavallaro@...com,
        alexandre.torgue@...com, pavel@....cz, niklass@...s.com,
        netdev@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH net-next] net: stmmac: remove superfluous wmb() memory
 barriers

From: Jose Abreu <Jose.Abreu@...opsys.com>
Date: Fri, 9 Mar 2018 10:26:11 +0000

> Sorry but I know at least two architectures which don't do a
> wmb() upon an writel [1] [2]. This can be critical if if we are
> accessing the device through some slow or filled bus which will
> delay accesses to the device IO. Notice that writel and then
> readl to the same address will force CPU to wait for writel
> completion before readl, but in this case we are using DMA and
> then writel so I think a wmb() before the writel is a safe measure.

Wait a second.

This is not about whether there is an explicit memory barrier
instruction placed in the writel() implementation.

Are you saying that the cpu(s) in question will reorder stores in
their store buffers, even if they are to real memory vs. IOMEM?

That's really dangerous.