netdev - Re: [PATCH v3 18/18] infiniband: cxgb4: Eliminate duplicate barriers on weakly-ordered archs

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Date:   Sat, 17 Mar 2018 09:27:50 -0400 (EDT)
From:   David Miller <davem@...emloft.net>
To:     okaya@...eaurora.org
Cc:     swise@...ngridcomputing.com, netdev@...r.kernel.org,
        timur@...eaurora.org, sulrich@...eaurora.org,
        linux-arm-msm@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, swise@...lsio.com,
        dledford@...hat.com, jgg@...pe.ca, linux-rdma@...r.kernel.org,
        linux-kernel@...r.kernel.org, werner@...lsio.com,
        leedom@...lsio.com
Subject: Re: [PATCH v3 18/18] infiniband: cxgb4: Eliminate duplicate
 barriers on weakly-ordered archs

From: Sinan Kaya <okaya@...eaurora.org>
Date: Sat, 17 Mar 2018 00:25:14 -0400

> I think I finally got what you mean.
> 
> Code seems to have
> 
> wmb()
> writel()/writeq()
> wmb()
> 
> this can be safely replaced with
> 
> wmb()
> __raw_writel()/__raw_writeq()
> wmb()
> 
> This will work on all arches. Below is the new version. Let me know if this is OK.

Unfortunately, I think this won't work.

At least on sparc, the __raw_*() variants also change the endianness to
native endianness.

PowerPC does this as well, even documented in a comment :-)

/*
 * Non ordered and non-swapping "raw" accessors
 */

Only the non-__raw_ variants do the endianness swap to/from
little-endian.