netdev - Re: [PATCH v7 6/7] bnxt_en: Eliminate duplicate barriers on weakly-ordered archs

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Message-ID: <CACKFLinfo5xieJB_bgwXQhCCySZcGFpG2daqNcpX3gjgDKMdFA@mail.gmail.com>
Date:   Sun, 25 Mar 2018 13:24:12 -0700
From:   Michael Chan <michael.chan@...adcom.com>
To:     Sinan Kaya <okaya@...eaurora.org>
Cc:     Netdev <netdev@...r.kernel.org>, timur@...eaurora.org,
        sulrich@...eaurora.org, linux-arm-msm@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v7 6/7] bnxt_en: Eliminate duplicate barriers on
 weakly-ordered archs

On Sun, Mar 25, 2018 at 7:39 AM, Sinan Kaya <okaya@...eaurora.org> wrote:
> Code includes wmb() followed by writel(). writel() already has a barrier on
> some architectures like arm64.
>
> This ends up CPU observing two barriers back to back before executing the
> register write.
>
> Create a new wrapper function with relaxed write operator. Use the new
> wrapper when a write is following a wmb().
>
> Since code already has an explicit barrier call, changing writel() to
> writel_relaxed().
>
> Also add mmiowb() so that write code doesn't move outside of scope.

This line in the patch description is not needed anymore.  Other than that,

Acked-by: Michael Chan <michael.chan@...adcom.com>

Thanks.
>
> Signed-off-by: Sinan Kaya <okaya@...eaurora.org>