netdev - Re: Re: [PATCH v7 0/7] netdev: intel: Eliminate duplicate barriers on weakly-ordered archs

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Date:   Tue, 27 Mar 2018 16:04:20 +0200
From:   "Lino Sanfilippo" <LinoSanfilippo@....de>
To:     "Sinan Kaya" <okaya@...eaurora.org>
Cc:     "Jeff Kirsher" <jeffrey.t.kirsher@...el.com>,
        "Alexander Duyck" <alexander.duyck@...il.com>,
        intel-wired-lan <intel-wired-lan@...ts.osuosl.org>,
        Netdev <netdev@...r.kernel.org>,
        "Timur Tabi" <timur@...eaurora.org>, sulrich@...eaurora.org,
        linux-arm-msm@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: Re: [PATCH v7 0/7] netdev: intel: Eliminate duplicate barriers
 on weakly-ordered archs

Hi,

> Double sorry now.
> 
> I don't know if you have been following "RFC on writel and writel_relaxed" thread
> or not but there are some new developments about wmb() requirement. 

Just out of interest: Where can this thread be found?

> 
> Basically, wmb() should never be used before writel() as writel() seem to
> provide coherency and observability guarantee.
> 

AFAIU memory-barriers.txt writel() only guarantees correct order of accesses to
IO-memory not RAM vs. IO-memory (this may be the case for some architectures 
where the writel() implementation contains a wmb() but not for all).
For the RAM vs. IO-memory case at least a a wmb()/rmb() has to be used. 
Is this not correct? 

Regards,
Lino