netdev - Re: [PATCH v12 01/10] dt-bindings: Add Cavium Octeon Common Ethernet Interface.

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Date:   Sat, 7 Jul 2018 00:41:39 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     "Steven J. Hill" <shill@...iumnetworks.com>
Cc:     netdev@...r.kernel.org,
        Chandrakala Chavva <cchavva@...iumnetworks.com>
Subject: Re: [PATCH v12 01/10] dt-bindings: Add Cavium Octeon Common Ethernet
 Interface.

On Fri, Jul 06, 2018 at 05:10:39PM -0500, Steven J. Hill wrote:
> On 06/28/2018 03:35 AM, Andrew Lunn wrote:
> > 
> >> +- cavium,rx-clk-delay-bypass: Set to <1> to bypass the rx clock delay setting.
> >> +  Needed by the Micrel PHY.
> > 
> > Could you explain this some more. Is it anything to do with RGMII delays?
> > 
> Andrew,
> 
> One of my colleagues tracked this down for me. This device tree option is in place
> because there are several different ways to do the clock and data with respect to
> RGMII. This controls the delay introduced for the RX clock with respect to the data.
> Without this, RX will not work with Micrel PHYs. Thanks.

Hi Steven

This is his RGMII delays, as i guess.

Don't add this property, do it the Linux way. Look at phy-mode values

phy.h:	  PHY_INTERFACE_MODE_RGMII_ID,
phy.h:	  PHY_INTERFACE_MODE_RGMII_RXID,
phy.h:	  PHY_INTERFACE_MODE_RGMII_TXID,

There are plenty of examples in drivers/net/ethernet

      Andrew