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Message-ID: <20180729181027.GA15150@lunn.ch>
Date: Sun, 29 Jul 2018 20:10:27 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Hauke Mehrtens <hauke@...ke-m.de>
Cc: davem@...emloft.net, netdev@...r.kernel.org,
vivien.didelot@...oirfairelinux.com, f.fainelli@...il.com,
john@...ozen.org, linux-mips@...ux-mips.org, dev@...sin.me,
hauke.mehrtens@...el.com
Subject: Re: [PATCH 3/4] net: lantiq: Add Lantiq / Intel vrx200 Ethernet
driver
> The embedded PHYs are only connected to the switch in this SoC and on
> all other SoCs from this line I am aware of.
Hi Hauke
O.K, then it makes sense to have it part of the switch driver.
> The firmware is 64KBytes big and we have to load that into continuous
> memory which is then used by the PHY itself. When we are late in the
> boot process we could run into memory problems, most devices have 64MB
> or 128MB of RAM.
You might want to look at using CMA. I've never used it myself, so
cannot help much.
> How should the device tree binding should look like?
>
> Should I create an extra sub node:
>
> gswip: gswip@...8000 {
> #address-cells = <1>;
> #size-cells = <0>;
> compatible = "lantiq,xrx200-gswip";
> reg = < 0xE108000 0x3000 /* switch */
> 0xE10B100 0x70 /* mdio */
> 0xE10B1D8 0x30 /* mii */
> >;
> dsa,member = <0 0>;
>
> ports {
> #address-cells = <1>;
> #size-cells = <0>;
>
> port@0 {
> reg = <0>;
> label = "lan3";
> phy-mode = "rgmii";
> phy-handle = <&phy0>;
> };
> ....
> };
>
> mdio@0 {
> #address-cells = <1>;
> #size-cells = <0>;
> compatible = "lantiq,xrx200-mdio";
> reg = <0>;
>
> phy0: ethernet-phy@0 {
> reg = <0x0>;
> };
> ....
> };
>
> # this would be the new part
> phys {
> gphy0: gphy@20 {
> compatible = "lantiq,xrx200a2x-gphy";
It would be good to make it clear this is for firmware download. So
scatter "firmware" or "fw" in some of these names. What we don't want
is a mix up with phy's within the mdio subtree. Otherwise this looks
good. But you should cross post the device tree binding to the device
tree mailing list.
Andrew
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