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Message-ID: <4dd7d451-a1e3-cab8-dc5a-6666c5d29089@gmail.com>
Date: Mon, 30 Jul 2018 09:53:31 -0700
From: Florian Fainelli <f.fainelli@...il.com>
To: Quentin Schulz <quentin.schulz@...tlin.com>, andrew@...n.ch,
davem@...emloft.net
Cc: netdev@...r.kernel.org, alexandre.belloni@...tlin.com,
linux-kernel@...r.kernel.org, thomas.petazzoni@...tlin.com
Subject: Re: [PATCH net-next] net: phy: mscc: the extended page access
register is 16 bits
On 07/30/2018 05:53 AM, Quentin Schulz wrote:
> The Extended Page Access is a 16-bit register, so change the page
> parameter of vsc85xx_phy_page_set to a u16.
>
> Signed-off-by: Quentin Schulz <quentin.schulz@...tlin.com>
Since you targeted net-next for this patch, I am assuming this is not
yet a problem, but would soon be one with the changes you plan on
introducing?
> ---
> drivers/net/phy/mscc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/net/phy/mscc.c b/drivers/net/phy/mscc.c
> index 650c2667d523..84ca9ff40ae0 100644
> --- a/drivers/net/phy/mscc.c
> +++ b/drivers/net/phy/mscc.c
> @@ -123,7 +123,7 @@ static const struct vsc8531_edge_rate_table edge_table[] = {
> };
> #endif /* CONFIG_OF_MDIO */
>
> -static int vsc85xx_phy_page_set(struct phy_device *phydev, u8 page)
> +static int vsc85xx_phy_page_set(struct phy_device *phydev, u16 page)
> {
> int rc;
>
>
--
Florian
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