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Message-Id: <cd75c96640cc7fe306ee355acb1db85adb5b796f.1532954208.git-series.quentin.schulz@bootlin.com>
Date: Mon, 30 Jul 2018 14:43:52 +0200
From: Quentin Schulz <quentin.schulz@...tlin.com>
To: alexandre.belloni@...tlin.com, ralf@...ux-mips.org,
paul.burton@...s.com, jhogan@...nel.org, robh+dt@...nel.org,
mark.rutland@....com, davem@...emloft.net
Cc: kishon@...com, andrew@...n.ch, f.fainelli@...il.com,
linux-mips@...ux-mips.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, netdev@...r.kernel.org,
allan.nielsen@...rosemi.com, thomas.petazzoni@...tlin.com,
Quentin Schulz <quentin.schulz@...tlin.com>
Subject: [PATCH 07/10] dt-bindings: phy: add DT binding for Microsemi Ocelot SerDes muxing
Signed-off-by: Quentin Schulz <quentin.schulz@...tlin.com>
---
Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt | 42 +++++++-
1 file changed, 42 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt
diff --git a/Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt b/Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt
new file mode 100644
index 0000000..25b102d
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt
@@ -0,0 +1,42 @@
+Microsemi Ocelot SerDes muxing driver
+-------------------------------------
+
+On Microsemi Ocelot, there is a handful of registers in HSIO address
+space for setting up the SerDes to switch port muxing.
+
+A SerDes X can be "muxed" to work with switch port Y or Z for example.
+One specific SerDes can also be used as a PCIe interface.
+
+Hence, a SerDes represents an interface, be it an Ethernet or a PCIe one.
+
+There are two kinds of SerDes: SERDES1G supports 10/100Mbps in
+half/full-duplex and 1000Mbps in full-duplex mode while SERDES6G supports
+10/100Mbps in half/full-duplex and 1000/2500Mbps in full-duplex mode.
+
+Also, SERDES6G number (aka "macro") 0 is the only interface supporting
+QSGMII.
+
+Required properties:
+
+- compatible: should be "mscc,vsc7514-serdes"
+- #phy-cells : from the generic phy bindings, must be 3. The first number
+ defines the kind of Serdes (1 for SERDES1G_X, 6 for
+ SERDES6G_X), the second defines the macros in the specified
+ kind of Serdes (X for SERDES1G_X or SERDES6G_X) and the
+ last one defines the input port to use for a given SerDes
+ macro,
+
+Example:
+
+ serdes: serdes {
+ compatible = "mscc,vsc7514-serdes";
+ #phy-cells = <3>;
+ };
+
+ ethernet {
+ port1 {
+ phy-handle = <&phy_foo>;
+ /* Link SERDES1G_5 to port1 */
+ phys = <&serdes 1 5 1>;
+ };
+ };
--
git-series 0.9.1
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