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Message-Id: <20180730125313.3405-1-quentin.schulz@bootlin.com>
Date:   Mon, 30 Jul 2018 14:53:13 +0200
From:   Quentin Schulz <quentin.schulz@...tlin.com>
To:     andrew@...n.ch, f.fainelli@...il.com, davem@...emloft.net
Cc:     netdev@...r.kernel.org, alexandre.belloni@...tlin.com,
        linux-kernel@...r.kernel.org, thomas.petazzoni@...tlin.com,
        Quentin Schulz <quentin.schulz@...tlin.com>
Subject: [PATCH net-next] net: phy: mscc: the extended page access register is 16 bits

The Extended Page Access is a 16-bit register, so change the page
parameter of vsc85xx_phy_page_set to a u16.

Signed-off-by: Quentin Schulz <quentin.schulz@...tlin.com>
---
 drivers/net/phy/mscc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/phy/mscc.c b/drivers/net/phy/mscc.c
index 650c2667d523..84ca9ff40ae0 100644
--- a/drivers/net/phy/mscc.c
+++ b/drivers/net/phy/mscc.c
@@ -123,7 +123,7 @@ static const struct vsc8531_edge_rate_table edge_table[] = {
 };
 #endif /* CONFIG_OF_MDIO */
 
-static int vsc85xx_phy_page_set(struct phy_device *phydev, u8 page)
+static int vsc85xx_phy_page_set(struct phy_device *phydev, u16 page)
 {
 	int rc;
 
-- 
2.17.1

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