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Message-ID: <97935531-eedb-0670-9795-93abbed76894@suse.de>
Date:   Fri, 10 Aug 2018 13:37:37 +0200
From:   Andreas Färber <afaerber@...e.de>
To:     Ben Whitten <Ben.Whitten@...rdtech.com>,
        Ben Whitten <ben.whitten@...il.com>
Cc:     "starnight@...cu.edu.tw" <starnight@...cu.edu.tw>,
        "hasnain.virk@....com" <hasnain.virk@....com>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        Xue Liu <liuxuenetmail@...il.com>,
        Sebastian Heß <shess@...sware.de>,
        Yannick Lanz <yannick.lanz@...ixone.io>
Subject: Re: [PATCH lora-next 01/10] net: lora: sx1301: add register,
 bit-fields, and helpers for regmap

Am 09.08.2018 um 15:23 schrieb Ben Whitten:
>> BTW we'll need this regmap conversion for the picoGW_hal,
>> so once we
>> have a working SPI regmap driver, we'll need to split out the
>> SPI bits,
>> similar to sx125x.
> 
> I am unfamiliar with the picoGW_hal, do they expose the sx1301
> as a device on a regmap_bus then?

It uses an MCU implementing a USB CDC interface that implements UART
commands corresponding to the individual SPI read and write modes like
single and burst. That reference design is for SX1308, but some vendors
appear to be using it for SX1301, too.

https://github.com/Lora-net/picoGW_mcu

So I believe I'll need to implement a regmap_bus in a new serdev driver
to support it, once I gain access to such an implementation.

But there's other general serdev problems with USB not limited to picoGW
that I'll need to start a thread about on linux-serial/linux-usb...

Regards,
Andreas

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