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Message-ID: <CAMuHMdXU394+E3Z3tR-6iRSiWVDWUpxPLZdxg8zdgWxW5+SOOg@mail.gmail.com>
Date:   Mon, 3 Sep 2018 16:24:16 +0200
From:   Geert Uytterhoeven <geert@...ux-m68k.org>
To:     Matthew Wilcox <willy@...radead.org>
Cc:     Janusz Krzysztofik <jmkrzyszt@...il.com>,
        Linus Walleij <linus.walleij@...aro.org>,
        Jonathan Corbet <corbet@....net>,
        Miguel Ojeda Sandonis <miguel.ojeda.sandonis@...il.com>,
        peter.korsgaard@...co.com, Peter Rosin <peda@...ntia.se>,
        Ulf Hansson <ulf.hansson@...aro.org>,
        Andrew Lunn <andrew@...n.ch>,
        Florian Fainelli <f.fainelli@...il.com>,
        "David S. Miller" <davem@...emloft.net>,
        Dominik Brodowski <linux@...inikbrodowski.net>,
        Greg KH <gregkh@...uxfoundation.org>,
        Kishon Vijay Abraham I <kishon@...com>,
        Lars-Peter Clausen <lars@...afoo.de>,
        Michael Hennerich <Michael.Hennerich@...log.com>,
        Jonathan Cameron <jic23@...nel.org>,
        Hartmut Knaack <knaack.h@....de>,
        Peter Meerwald <pmeerw@...erw.net>,
        Jiri Slaby <jslaby@...e.com>, Willy Tarreau <w@....eu>,
        "open list:DOCUMENTATION" <linux-doc@...r.kernel.org>,
        Linux I2C <linux-i2c@...r.kernel.org>,
        Linux MMC List <linux-mmc@...r.kernel.org>,
        netdev <netdev@...r.kernel.org>, linux-iio@...r.kernel.org,
        driverdevel <devel@...verdev.osuosl.org>,
        "open list:SERIAL DRIVERS" <linux-serial@...r.kernel.org>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        sebastien.bourdelin@...oirfairelinux.com,
        Lukas Wunner <lukas@...ner.de>,
        Rojhalat Ibrahim <imr@...chenk.de>,
        Russell King <rmk+kernel@...linux.org.uk>,
        ext Tony Lindgren <tony@...mide.com>,
        Yegor Yefremov <yegorslists@...glemail.com>,
        Uwe Kleine-König 
        <u.kleine-koenig@...gutronix.de>,
        linuxppc-dev <linuxppc-dev@...ts.ozlabs.org>
Subject: Re: [PATCH v7 1/4] gpiolib: Pass bitmaps, not integer arrays, to
 get/set array

On Mon, Sep 3, 2018 at 6:31 AM Matthew Wilcox <willy@...radead.org> wrote:
> > +++ b/drivers/auxdisplay/hd44780.c
> > @@ -62,17 +62,12 @@ static void hd44780_strobe_gpio(struct hd44780 *hd)
> >  /* write to an LCD panel register in 8 bit GPIO mode */
> >  static void hd44780_write_gpio8(struct hd44780 *hd, u8 val, unsigned int rs)
> >  {
> > -     int values[10]; /* for DATA[0-7], RS, RW */
> > -     unsigned int i, n;
> > -
> > -     for (i = 0; i < 8; i++)
> > -             values[PIN_DATA0 + i] = !!(val & BIT(i));
> > -     values[PIN_CTRL_RS] = rs;
> > -     n = 9;
> > -     if (hd->pins[PIN_CTRL_RW]) {
> > -             values[PIN_CTRL_RW] = 0;
> > -             n++;
> > -     }
> > +     DECLARE_BITMAP(values, 10); /* for DATA[0-7], RS, RW */
> > +     unsigned int n;
> > +
> > +     *values = val;
> > +     __assign_bit(8, values, rs);
> > +     n = hd->pins[PIN_CTRL_RW] ? 10 : 9;
>
> Doesn't this assume little endian bitmaps?  Has anyone tested this on
> big-endian machines?

include/linux/bitops.h:

static __always_inline void __assign_bit(long nr, volatile unsigned long *addr,
                                         bool value)
{
        if (value)
                __set_bit(nr, addr);
        else
                __clear_bit(nr, addr);
}

include/asm-generic/bitops/non-atomic.h:

static inline void __set_bit(int nr, volatile unsigned long *addr)
{
        unsigned long mask = BIT_MASK(nr);
        unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);

        *p  |= mask;
}

include/linux/bits.h:

#define BIT_MASK(nr)            (1UL << ((nr) % BITS_PER_LONG))

Looks like native endianness to me.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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