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Date:   Wed, 05 Sep 2018 07:56:19 -0700 (PDT)
From:   David Miller <davem@...emloft.net>
To:     petrm@...lanox.com
Cc:     netdev@...r.kernel.org, jiri@...lanox.com, idosch@...lanox.com
Subject: Re: [PATCH net] mlxsw: spectrum_buffers: Set up a dedicated pool
 for BUM traffic

From: Petr Machata <petrm@...lanox.com>
Date: Wed, 05 Sep 2018 12:16:00 +0200

> MC-aware mode was recently enabled by mlxsw on Spectrum switches in
> commit 7b8195306694 ("mlxsw: spectrum: Configure MC-aware mode on mlxsw
> ports"). Unfortunately, testing has shown that the fix is incomplete and
> in the presented form actually makes the problem even worse, because any
> amount of MC traffic causes UC disruption.
> 
> The reason for this is that currently, mlxsw configures the MC-specific
> TCs (8..15) to map to pool 0. It also configures a maximum buffer size
> of 0, but for MC traffic that maximum is disregarded and not part of the
> quota. Therefore MC traffic is always admitted to the egress buffer.
> 
> Fix the configuration by directing the MC TCs into pool 15, which is
> dedicated to MC traffic and recognized as such by the silicon.
> 
> Fixes: 7b8195306694 ("mlxsw: spectrum: Configure MC-aware mode on mlxsw ports")
> Signed-off-by: Petr Machata <petrm@...lanox.com>
> Acked-by: Jiri Pirko <jiri@...lanox.com>

Applied, thank you.

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