netdev - Re: [PATCH net-next v3 07/11] dt-bindings: phy: add DT binding for Microsemi Ocelot SerDes muxing

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Date:   Wed, 26 Sep 2018 16:35:09 -0500
From:   Rob Herring <robh@...nel.org>
To:     Quentin Schulz <quentin.schulz@...tlin.com>
Cc:     alexandre.belloni@...tlin.com, ralf@...ux-mips.org,
        paul.burton@...s.com, jhogan@...nel.org, mark.rutland@....com,
        davem@...emloft.net, kishon@...com, andrew@...n.ch,
        f.fainelli@...il.com, allan.nielsen@...rochip.com,
        linux-mips@...ux-mips.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, netdev@...r.kernel.org,
        thomas.petazzoni@...tlin.com
Subject: Re: [PATCH net-next v3 07/11] dt-bindings: phy: add DT binding for
 Microsemi Ocelot SerDes muxing

On Fri, Sep 14, 2018 at 10:16:05AM +0200, Quentin Schulz wrote:
> Signed-off-by: Quentin Schulz <quentin.schulz@...tlin.com>
> ---
>  Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt | 40 +++++++-
>  1 file changed, 40 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt
> 
> diff --git a/Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt b/Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt
> new file mode 100644
> index 0000000..2a88cc3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt
> @@ -0,0 +1,40 @@
> +Microsemi Ocelot SerDes muxing driver
> +-------------------------------------
> +
> +On Microsemi Ocelot, there is a handful of registers in HSIO address
> +space for setting up the SerDes to switch port muxing.
> +
> +A SerDes X can be "muxed" to work with switch port Y or Z for example.
> +One specific SerDes can also be used as a PCIe interface.
> +
> +Hence, a SerDes represents an interface, be it an Ethernet or a PCIe one.
> +
> +There are two kinds of SerDes: SERDES1G supports 10/100Mbps in
> +half/full-duplex and 1000Mbps in full-duplex mode while SERDES6G supports
> +10/100Mbps in half/full-duplex and 1000/2500Mbps in full-duplex mode.
> +
> +Also, SERDES6G number (aka "macro") 0 is the only interface supporting
> +QSGMII.
> +
> +Required properties:
> +
> +- compatible: should be "mscc,vsc7514-serdes"
> +- #phy-cells : from the generic phy bindings, must be 2.
> +	       The first number defines the input port to use for a given
> +	       SerDes macro. The second defines the macro to use. They are
> +	       defined in dt-bindings/phy/phy-ocelot-serdes.h

You need to define what this is a child of.

> +
> +Example:
> +
> +	serdes: serdes {
> +		compatible = "mscc,vsc7514-serdes";
> +		#phy-cells = <2>;

However, if there are no other resources associated with this, then you 
don't even need this child node. The parent can be a phy provider and 
provider of other functions too.

> +	};
> +
> +	ethernet {
> +		port1 {
> +			phy-handle = <&phy_foo>;
> +			/* Link SERDES1G_5 to port1 */
> +			phys = <&serdes 1 SERDES1G_5>;
> +		};
> +	};
> -- 
> git-series 0.9.1