netdev - Re: r8169 tx batching(?) causing performance problems

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Message-Id: <20181003.144334.513463899629095170.davem@davemloft.net>
Date:   Wed, 03 Oct 2018 14:43:34 -0700 (PDT)
From:   David Miller <davem@...emloft.net>
To:     dhowells@...hat.com
Cc:     nic_swsd@...ltek.com, netdev@...r.kernel.org
Subject: Re: r8169 tx batching(?) causing performance problems

From: David Howells <dhowells@...hat.com>
Date: Wed, 03 Oct 2018 21:19:40 +0100

> David Miller <davem@...emloft.net> wrote:
> 
>> Probably you are seeing some interrupt mitigation.
>> 
>> It seems there is a difference in how the interrupt mitigation is
>> programmed on for 8168 chips vs. others by default.  Most get
>> all zeros in the IntrMitigate register, whilst for 8168 chips
>> a value of 0x5151 is programmed.
> 
> I'm not sure what that means.  I can't seem to find a programmer's manual for
> the chip.

There is a comment which documents what might be the register layout
elsewhere in the driver:

	/*
	 * Undocumented corner. Supposedly:
	 * (TxTimer << 12) | (TxPackets << 8) | (RxTimer << 4) | RxPackets
	 */
	RTL_W16(tp, IntrMitigate, 0x0000);