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Message-ID: <20181019154439.GC24045@1wt.eu>
Date:   Fri, 19 Oct 2018 17:44:39 +0200
From:   Willy Tarreau <w@....eu>
To:     Richard Genoud <richard.genoud@...il.com>
Cc:     Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
        Antoine Tenart <antoine.tenart@...tlin.com>,
        Gregory CLEMENT <gregory.clement@...tlin.com>,
        Yelena Krivosheev <yelena@...vell.com>,
        Maxime Chevallier <maxime.chevallier@...tlin.com>,
        Nicolas Ferre <nicolas.ferre@...rochip.com>,
        netdev@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: CRC errors between mvneta and macb

On Fri, Oct 19, 2018 at 05:15:03PM +0200, Richard Genoud wrote:
> When there's a CRC error, the TXCLK has its polarity inverted...
> That's a clue !
> 
> But this TXCLK (25MHz) is not used on the g35-ek.
> Only the REFCLK/XT2 (50MHz) is used to synchronise the PHY and the macb.
> So I guess that the TXCLK has a role to play to generate TX+/TX-

Well, just a stupid idea, maybe when this signal is inverted, the TX+/TX-
are desynchronized by half a clock and are not always properly interpreted
on the other side ?

Willy

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