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Message-ID: <SN6PR07MB5024578EC06BDA6E49A4960390F50@SN6PR07MB5024.namprd07.prod.outlook.com>
Date:   Tue, 23 Oct 2018 05:16:21 +0000
From:   "Elior, Ariel" <Ariel.Elior@...ium.com>
To:     David Miller <davem@...emloft.net>
CC:     "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "Kalderon, Michal" <Michal.Kalderon@...ium.com>,
        "Tayar, Tomer" <Tomer.Tayar@...ium.com>
Subject: RE: [PATCH net-next v2 1/6] qed: Add doorbell overflow recovery
 mechanism

>
> > +#ifndef writeq
> > +#define writeq writeq
> > +static inline void writeq(u64 val, void __iomem *reg)
> > +{
> > +     writel(val & 0xffffffff, reg);
> > +     writel(val >> 32, reg + 0x4UL);
> > +}
> > +#endif
> 
> Please use the appropriate generic header file to achieve this, do not
> reimplement it.
> 
> See include/linux/io-64-nonatomic*.h and think very carefully about
> which one is appropriate.
> 
> Specifically, if a register read has side effects but only if you read
> the lower or upper half you want to make sure that you use the
> implementation that reads the half the doesn't trigger the side
> effects first.  This way the whole 64-bit value can be sampled before
> status bits clear, or whatever.
> 
> Likewise for which half of a register, when written, commits the
> results.
> 
> If both halfs trigger the side effect or the commit of the write, you
> cannot enable your driver on 32-bit architectures.
> 
> So this is not such a simple fix where you just hack the build to pass,
> you have to really think hard about what the code does, how the hardware
> works, and if this can even work properly on 32-bit platforms.
> 
> Thank you.

Thanks for pointing out the generic implementation. In our drivers we only use
The 64b macros for a single purpose - writing the rdma CQ doorbells. It will not
be used in any other register access. In this case the "lower and then upper" is
the correct behavior for us. I will send a v3 using the generic implementation.

Thanks,
Ariel

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