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Message-Id: <20181108.194755.2227584522482516860.davem@davemloft.net>
Date:   Thu, 08 Nov 2018 19:47:55 -0800 (PST)
From:   David Miller <davem@...emloft.net>
To:     thor.thayer@...ux.intel.com
Cc:     peppe.cavallaro@...com, alexandre.torgue@...com,
        joabreu@...opsys.com, netdev@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCHv2] net: stmmac: Fix RX packet size > 8191

From: thor.thayer@...ux.intel.com
Date: Thu,  8 Nov 2018 11:42:14 -0600

> From: Thor Thayer <thor.thayer@...ux.intel.com>
> 
> Ping problems with packets > 8191 as shown:
> 
> PING 192.168.1.99 (192.168.1.99) 8150(8178) bytes of data.
> 8158 bytes from 192.168.1.99: icmp_seq=1 ttl=64 time=0.669 ms
> wrong data byte 8144 should be 0xd0 but was 0x0
> 16    10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f
>       20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f
> %< ---------------snip--------------------------------------
> 8112  b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 ba bb bc bd be bf
>       c0 c1 c2 c3 c4 c5 c6 c7 c8 c9 ca cb cc cd ce cf
> 8144  0 0 0 0 d0 d1
>       ^^^^^^^
> Notice the 4 bytes of 0 before the expected byte of d0.
> 
> Databook notes that the RX buffer must be a multiple of 4/8/16
> bytes [1].
> 
> Update the DMA Buffer size define to 8188 instead of 8192. Remove
> the -1 from the RX buffer size allocations and use the new
> DMA Buffer size directly.
> 
> [1] Synopsys DesignWare Cores Ethernet MAC Universal v3.70a
>     [section 8.4.2 - Table 8-24]
> 
> Tested on SoCFPGA Stratix10 with ping sweep from 100 to 8300 byte packets.
> 
> Fixes: 286a83721720 ("stmmac: add CHAINED descriptor mode support (V4)")
> Suggested-by: Jose Abreu <jose.abreu@...opsys.com>
> Signed-off-by: Thor Thayer <thor.thayer@...ux.intel.com>

Applied.

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