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Message-ID: <20181120144905.GD18335@lunn.ch>
Date: Tue, 20 Nov 2018 15:49:05 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Biao Huang <biao.huang@...iatek.com>
Cc: davem@...emloft.net, robh+dt@...nel.org,
honghui.zhang@...iatek.com, yt.shen@...iatek.com,
liguo.zhang@...iatek.com, mark.rutland@....com,
nelson.chang@...iatek.com, matthias.bgg@...il.com,
netdev@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, joabreu@...opsys.com
Subject: Re: [v4, PATCH 2/2] dt-binding: mediatek-dwmac: add binding document
for MediaTek MT2712 DWMAC
> +Optional properties:
> +- mediatek,tx-delay: TX clock delay macro value. Range is 0~31. Default is 0.
> + It should be defined for rgmii/rgmii-rxid/mii interface.
> +- mediatek,rx-delay: RX clock delay macro value. Range is 0~31. Default is 0.
> + It should be defined for rgmii/rgmii-txid/mii/rmii interface.
> +- mediatek,fine-tune: boolean property, if present indicates that fine delay
> + is selected for rgmii interface.
> + If present, tx-delay/rx-delay is 170+/-50ps per stage.
> + Else tx-delay/rx-delay of coarse delay macro is 0.55+/-0.2ns per stage.
> + This property do not apply to non-rgmii PHYs.
> + Only coarse-tune delay is supported for mii/rmii PHYs.
Didn't Rob say to express the delay in pS, and have the driver convert
that to values to put into registers. That is what i would prefer.
Andrew
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