netdev - maximum number of cpu cores for interrupt handling

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [day] [month] [year] [list]

Message-ID: <20181122132123.GB15537@legohost>
Date:   Thu, 22 Nov 2018 16:21:23 +0300
From:   Oleg <lego12239@...dex.ru>
To:     netdev@...r.kernel.org
Subject: maximum number of cpu cores for interrupt handling

  Hi, all.

I found info that IO APIC limit the number of cpu cores for
interrupt handling to 8(because of just 4 bits using for cpu number
or something like this). But now MSI/MSI-X is used for interrupts
and i don't know is this limit is actual now.

For example, i have 4 nic with 8 rx/tx queues each and 32 cpu cores.
Can i scale nic interrupt handling to all this cores with smp_affinity?

Thanks.

-- 
Олег Неманов (Oleg Nemanov)