netdev - Re: [PATCH net-next 0/2] Add mii_bus to ixgbe driver for dsa devs

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Date:   Thu, 29 Nov 2018 14:54:27 -0800
From:   Jeff Kirsher <jeffrey.t.kirsher@...el.com>
To:     Steve Douthit <stephend@...icom-usa.com>
Cc:     "David S. Miller" <davem@...emloft.net>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>
Subject: Re: [PATCH net-next 0/2] Add mii_bus to ixgbe driver for dsa devs

On Thu, 2018-11-29 at 22:19 +0000, Steve Douthit wrote:
> On 11/29/18 2:03 PM, Jeff Kirsher wrote:
> > On Thu, 2018-11-29 at 18:54 +0000, Steve Douthit wrote:
> > > Most dsa devices currently expect to get a pointer to a mii_bus from
> > > platform data of device tree information.
> > > 
> > > The first patch exposes a mii_bus for ixgbe devices.
> > > 
> > > Currently the ixgbe driver only allows accesses to the probed PHY
> > > address via ioctls. The second patch changes that behavior to allow
> > > access to all addresses.  This should be useful for doing switch
> > > peeks &
> > > pokes from userspace for development, test, or if theres no dsa
> > > driver
> > > for a particular switch yet.
> > > 
> > > I've tested the clause 22 portion of this code on a board that has an
> > > Intel C3xxx series SoC connected to a Marvell Peridot switch.  I
> > > don't
> > > have any clause 45 devices or other ixgbe devices to test with.
> > > 
> > > Stephen Douthit (2):
> > >    ixgbe: register a mdiobus
> > >    ixgbe: use mii_bus to handle MII related ioctls
> > > 
> > >   drivers/net/ethernet/intel/ixgbe/ixgbe.h      |   2 +
> > >   drivers/net/ethernet/intel/ixgbe/ixgbe_main.c |  35 ++--
> > >   drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c  | 192
> > > ++++++++++++++++++
> > >   drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h  |   2 +
> > >   4 files changed, 216 insertions(+), 15 deletions(-)
> > > 
> > 
> > I will add these changes to my queue, please remember to send patches
> > against the drivers in drivers/net/ethernet/intel/* to
> > intel-wired-lan@...ts.osuosl.org  mailing list as well, so that our
> > patchwork project can track the patches.
> 
> Sorry about that, I'll add it to the CC list for the next rev.
> 
> I started adding another board to the platform driver that needs this
> code and found a bug.  The new board has more lanes enabled via soft
> straps.  That caused sysfs to complain because I ended up with duplicate
> bus IDs from this code:
> 
> +	/* Use the position of the device in the PCI hierarchy as the id */
> +	snprintf(bus->id, MII_BUS_ID_SIZE, "%s-mdio-%s", ixgbe_driver_name,
> +		 pci_name(pdev->bus->self));
> 
> Please drop this series for now.

Ok, it has been dropped and I will wait for v2.

> Thinking about this some more I probably need to ensure that only a
> single mii_bus is registered out of all the discovered x550em_a devices.
> More generally there's not always going to be a 1:1 mapping between MACs
> and MIIs on these devices and the code should handle that.
> 
> I think for the next rev I'll only register a single mii_bus for the
> lowest numbered bus:device.function x500em_a device, and skip mii_bus
> setup entirely for other device IDs.
> 
> Let me know if there's another/better way to tackle that.

I will bring this up with our 10GbE driver lead, he may have ideas.  Any
patches sent to intel-wired-lan@...ts.osuosl.org mailing list will be seen
by our 10GbE driver developers, so they can provide feedback.

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