netdev - Re: [PATCH 0/3]: net: dsa: mt7530: support MT7530 in the MT7621 SoC

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Date:   Fri, 30 Nov 2018 23:25:47 +1000
From:   Greg Ungerer <gerg@...nel.org>
To:     René van Dorst <rene@...rst.com>
Cc:     sean.wang@...iatek.com, andrew@...n.ch,
        vivien.didelot@...oirfairelinux.com, f.fainelli@...il.com,
        netdev@...r.kernel.org, blogic@...nwrt.org, neil@...wn.name,
        bjorn@...k.no
Subject: Re: [PATCH 0/3]: net: dsa: mt7530: support MT7530 in the MT7621 SoC

Hi Rene,

On 30/11/18 9:27 pm, René van Dorst wrote:
> Quoting gerg@...nel.org:
> 
>> I have been working towards supporting the MT7530 switch as used in the
>> MediaTek MT7621 SoC. Unlike the MediaTek MT7623 the MT7621 is built around
>> a dual core MIPS CPU architecture. But underneath it is what appears to
>> be the same 7530 switch.
>>
>> The following 3 patches are more of an RFC than anything. They allow
>> use of the mt7530 dsa driver on this device - though with some issues
>> still to resolve. The primary change required is to not use the 7623
>> specific clock and regulator setup - none of that applies when using
>> the 7621 (and maybe other devices?). The other change required is to
>> set the 7530 MFC register CPU port number and enable bit.
> 
> 
> Hi Greg,
> 
> Good to see that more people are working on the MT7621 device [1].
> So I added Bjorn to the CC.

Nice, thanks for the pointers.


> I am also working on this but on the OpenWRT side.
> My current code works for a Ubiquiti EdgeRouter X SFP. See kernel [2], openwrt [3]

I forgot to mention I am working from mainline kernels, so those
patches of mine are against 4.20-rc4. I am working on some new
custom hardware at the moment, but I have an Oolite v8.0 board I
can run code on too.


> Current status:
> 
> Using OpenWRT provided mainline v4.14 driver MT7530 and MT7623.
> I patches so that MT7621 is supported.
> This means DSA part is also working, internal and external phys are detected.
> I can use all of the five RJ45 ports and also MT7520 switch port 5 which connects to a external phy (at8033) for the SFP port.
> Last added TRGMII part also seems to work but with issues, see below.
> Openwrt uses port 5 as wan and gets a dhcp lease.
> 
> Issues:
> - I can't get 2nd GMAC talk to external phy. I have tried many many knobs but without success.
>    GMAC seems to work but no data is transmitted/received over the cable.
>    But I think this can be done later on. Adding basic support for MT7621 is good start.
> - Ethernet driver expects that the macs are initialized so that the mtk_hw_init can setup the hardware registers.
>    But they are not. See [4]
>    I don't know how to fix this. For the current code it is not an issue. It still works.
>    But it should be fixed.
>    Because of this I can't read the mac0 "phy-mode". I need this info to setup the tgrmii clock at hardware init.
> - Ethernet speed is unstable ~30-100mbit. I think I broke something. I have seems 1gbit before.
> 
> I hope that this can help you the get a step further.

Thanks, that is all good info.

Regards
Greg


> René
> 
> [1] https://lists.openwrt.org/pipermail/openwrt-devel/2018-August/013614.html
> [2] https://github.com/vDorst/linux-1/commits/mt7621-dsa-trgmii
> [3] https://github.com/vDorst/openwrt/commits/mt7621-dsa-trgmii
> [4] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/drivers/net/ethernet/mediatek/mtk_eth_soc.c?h=v4.14.84#n1946
> 
>