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Message-ID: <CAPhsuW5DhXfpyUxLBoij1VHtQ8E7SDrORhau4J8QWUK2_WwsbA@mail.gmail.com>
Date:   Sun, 2 Dec 2018 23:56:47 -0800
From:   Song Liu <liu.song.a23@...il.com>
To:     Jiong Wang <jiong.wang@...ronome.com>
Cc:     Daniel Borkmann <daniel@...earbox.net>,
        Alexei Starovoitov <ast@...nel.org>,
        Networking <netdev@...r.kernel.org>, oss-drivers@...ronome.com,
        markos.chandras@...tec.com, paul.burton@...s.com
Subject: Re: [PATCH bpf] mips: bpf: fix encoding bug for mm_srlv32_op

On Sat, Dec 1, 2018 at 1:12 AM Jiong Wang <jiong.wang@...ronome.com> wrote:
>
> For micro-mips, srlv inside POOL32A encoding space should use 0x50
> sub-opcode, NOT 0x90.
>
> Some early version ISA doc describes the encoding as 0x90 for both srlv and
> srav, this looks to me was a typo. I checked Binutils libopcode
> implementation which is using 0x50 for srlv and 0x90 for srav.
>
> Fixes: f31318fdf324 ("MIPS: uasm: Add srlv uasm instruction")
> CC: Markos Chandras <markos.chandras@...tec.com>
> CC: Paul Burton <paul.burton@...s.com>
> Acked-by: Jakub Kicinski <jakub.kicinski@...ronome.com>
> Signed-off-by: Jiong Wang <jiong.wang@...ronome.com>
Acked-by: Song Liu <songliubraving@...com>

> ---
>  arch/mips/include/uapi/asm/inst.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/mips/include/uapi/asm/inst.h b/arch/mips/include/uapi/asm/inst.h
> index c05dcf5..80f35e7 100644
> --- a/arch/mips/include/uapi/asm/inst.h
> +++ b/arch/mips/include/uapi/asm/inst.h
> @@ -370,7 +370,7 @@ enum mm_32a_minor_op {
>         mm_pool32axf_op = 0x03c,
>         mm_srl32_op = 0x040,
>         mm_sra_op = 0x080,
> -       mm_srlv32_op = 0x090,
> +       mm_srlv32_op = 0x050,
>         mm_rotr_op = 0x0c0,
>         mm_lwxs_op = 0x118,
>         mm_addu32_op = 0x150,
> --
> 2.7.4
>

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