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Message-Id: <9652147aca5739d77db46327f8688f327c66c29b.1543932233.git.baruch@tkos.co.il>
Date:   Tue,  4 Dec 2018 16:03:52 +0200
From:   Baruch Siach <baruch@...s.co.il>
To:     netdev@...r.kernel.org, Russell King <linux@...linux.org.uk>
Cc:     Baruch Siach <baruch@...s.co.il>,
        Maxime Chevallier <maxime.chevallier@...tlin.com>,
        Antoine Tenart <antoine.tenart@...tlin.com>
Subject: [PATCH v2 1/2] net: mvpp2: fix detection of 10G SFP modules

The mvpp2_phylink_validate() relies on the interface field of
phylink_link_state to determine valid link modes. However, when called
from phylink_sfp_module_insert() this field in not initialized. The
default switch case then excludes 10G link modes. This allows 10G SFP
modules that are detected correctly to be configured at max rate of
2.5G.

Catch the uninitialized PHY mode case, and allow 10G rates.

Fixes: d97c9f4ab000b ("net: mvpp2: 1000baseX support")
Cc: Maxime Chevallier <maxime.chevallier@...tlin.com>
Cc: Antoine Tenart <antoine.tenart@...tlin.com>
Acked-by: Russell King <rmk+kernel@...linux.org.uk>
Signed-off-by: Baruch Siach <baruch@...s.co.il>
---
v2:
  Add ack and fixes tags
---
 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
index 7a37a37e3fb3..eb1dc8abc359 100644
--- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
+++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
@@ -4384,6 +4384,7 @@ static void mvpp2_phylink_validate(struct net_device *dev,
 
 	switch (state->interface) {
 	case PHY_INTERFACE_MODE_10GKR:
+	case PHY_INTERFACE_MODE_NA:
 		phylink_set(mask, 10000baseCR_Full);
 		phylink_set(mask, 10000baseSR_Full);
 		phylink_set(mask, 10000baseLR_Full);
-- 
2.19.2

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